Đồ án tốt nghiệp - Analysis processing - in - memory on sram

HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY OF INTERNATIONAL EDUCATION

CAPSTONE DESIGN PROJECT
ANALYSIS PROCESSING – IN -MEMORY ON SRAM

MAJOR OF ELECTRONICS AND TELECOMUNICATIONS

Students:
VU THANH TRUNG
ID: 19161063
Supervisor: PhD. PHAM VAN KHOA

HCMC – 07/2024
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HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY OF INTERNATIONAL EDUCATION

CAPSTONE DESIGN PROJECT

ANALYSIS PROCESSING – IN -MEMORY ON SRAM
MAJOR OF ELECTRONICS AND TELECOMUNICATIONS

Students:
VU THANH TRUNG
ID: 19161063
Supervisor: PhD. PHAM VAN KHOA

HCMC – 07/2024

ii

THE SOCIALIST REPUBLIC OF VIETNAM

Independence – Freedom– Happiness


Ho Chi Minh City, July 05, 2024

GRADUATION PROJECT ASSIGNMENT
Student name: _Vũ Thành Trung_________

Student ID: 19161063

Student name: __________________________ Student ID: ___________________
Student name: __________________________ Student ID: ___________________
Major: Electronics And Telecommunications Class: 19161CLA1
Engineering ___________________________
Supervisor: PhD. Pham Van Khoa_________ Phone number: 0857244478
Date of assignment: _____________________ Date of submission: _____________
1. Project title: __Analysis Processing – in – memory on SRAM
_______________________________________________________
2. Initial materials provided by supervisor: ___________________________________
3. Content of the project: _________________________________________________
4. Final product: ________________________________________________________
CHAIR OF THE PROGRAM

SUPERVISOR

iii

THE SOCIALIST REPUBLIC OF VIETNAM

Independence – Freedom– Happiness
-

SUPERVISOR’S EVALUATION SHEET
Student name: Vũ Thành Trung

Student ID:19161063

Student name: .................................................................

Student ID:................................

Student name: .................................................................

Student ID: ...............................

Major: Electronics And Telecommunications Engineering
Project title: Analysis Processing – in – memory on SRAM..................................................
................................................................................................................................................
Supervisor: PhD. Pham Van Khoa..........................................................................................

EVALUATION
1. Content of the project:

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of Systems
Architecture 119 (2021).
[12] Jin Zhang, Zhiting Lin, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao and
Junning Chen, “An 8T SRAM Array with Configurable Word Lines for In-Memory
Computing Operation”, School of Electronics and Information Engineering, Anhui
University, Hefei 230601, China.
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2021.
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Feb. 2015, pp. 314–315.
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[18] A. Krizhevsky et al., “ImageNet classification with deep convolutional neural
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[20] J. Zhang, Z. Wang, and N. Verma, “A machine-learning classifier implemented in a
standard 6T SRAM array,” in Proc. IEEE Symp. VLSI Circuits (VLSI-Circuits), Jun. 2016,
pp. C252–C253.
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[21] X. Si et al., “24.5 A twin-8T SRAM computation-in-memory macro for multiple-bit
CNN-based machine learning,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech.
Papers, Feb. 2019, pp. 396–398.
[22] Sarah Brooks, Anthony Cicchetti, “Design of a Low Power Latch Based SRAM Sense
Amplifier”, March 27, 2014.
[23] Sarah Brooks, Anthony Cicchetti, “Design of a Low Power Latch Based SRAM Sense
Amplifier”, March 27, 2014.
[24] A. Pavlov and Manoj Sachdev, CMOS SRAM Circuit Design and Parametric Test in
Nano-Scaled Technologies. Springer 2008.

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